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authorSamuel Perrouault <samuel.perrouault@gmail.com>2025-03-26 15:53:56 +0100
committerSamuel Perrouault <samuel.perrouault@gmail.com>2025-03-26 15:53:56 +0100
commit7e9aa203cd7fea1644ed71055c9e5601d1daca39 (patch)
tree37a96503b1f72e13c39f71b0943afcdc875b79a3 /src/chip8.rs
parent48032d65b9b9a1df312d632c12909813f04fa135 (diff)
implement LD [I], Vx and LD Vx, [I]
Diffstat (limited to 'src/chip8.rs')
-rw-r--r--src/chip8.rs15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/chip8.rs b/src/chip8.rs
index ea3790b..a48b86a 100644
--- a/src/chip8.rs
+++ b/src/chip8.rs
@@ -181,6 +181,21 @@ impl Chip8 {
}
self.draw = true;
}
+ 0xF000 => match opcode & 0x00FF {
+ 0x0055 => {
+ eprintln!("LD [I], V{}", x);
+ for i in 0..=x {
+ self.memory[self.i as usize + i] = self.v[i];
+ }
+ }
+ 0x0065 => {
+ eprintln!("LD V{}, [I]", x);
+ for i in 0..=x {
+ self.v[i] = self.memory[self.i as usize + i];
+ }
+ }
+ _ => unknown_opcode(opcode),
+ },
_ => unknown_opcode(opcode),
};